Often, systems of this type are seen in Physical Layer Devices (usually denoted PHY), which are configured to receive and transmit Ethernet data from a physical medium, such as an electrical or optical cable.
In devices of this type, the data received is usually controlled and timed by the transmitter, whereby the timing is independent on the systems configured to receive and process the received data. A clock boundary is present in the Phy: two parts thereof operate on independent clocks.
Systems and solutions of this type may be seen in: P. Loschmidt et al.: “Limits of synchronization accuracy using hardware support in IEE 1588”, September 2008, WO2009/121421, US2009/0276542, US2013/0077642, US2006/129350, US2012/106576, U.S. Pat. No. 7,324,403 and U.S. Pat. No. 6,594,329.